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Fast AIS Data Decoding Algorithm for Multi-Core CPU

Volume 15, Number 3, March 2019, pp. 1045-1052
DOI: 10.23940/ijpe.19.03.p34.10451052

Xiangkun Zenga, Huaran Yanb, Yingjie Xiaob and Xiaoming Yangc

aCollege of Information Engineering, Shanghai Maritime University, Shanghai, 201306, China
bMerchant Marine College, Shanghai Maritime University, Shanghai, 201306, China
cShanghai Offshore Engineering Research Institute, Shanghai Maritime University, Shanghai, 201306, China

(Submitted on November 12, 2018; Revised on December 10, 2018; Accepted on January 8, 2019)

Abstract:

According to the provisions of the SOLAS convention, more than 600,000 ships in the world have installed automatic identification systems, which can produce more than 3 billion lines of AIS message data every day. The large amount of AIS message data provides many applications. At the same time, the design of efficient decoding of AIS messages has become a new problem. The former AIS message decoding methods mostly use online real-time decoding and decode the messages line by line according to the order of messages. These methods are slow and inefficient when decoding large amounts of AIS messages, and they cannot use multi-core CPU computing power to the extreme. In this paper, the decoding process is decomposed into several steps such as data reading, single-line message filtering, multi-line message filtering, single-line message binary transcoding, multi-line message binary transcoding, binary code decoding, and preservation results. Because multi-line message filtering and multi-line message binary transcoding are difficult to perform in parallel, these two steps are performed in serial, while the other steps are run in parallel. For binary code decoding, which consumes the largest computing resources in the process, the data is blocked first, and then decoding tasks are created and run in parallel. This method makes full use of the parallel computing capability of multi-core CPU and achieves high speed in the running test.

 

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